+--------------------------------------+
| 6. Joypads, paddles, expansion ports |
+--------------------------------------+

A. General Information
----------------------
The NES supports a myriad of input devices, including joypads, Zappers
(light guns), and four-player devices.

Joypad #1 and #2 are accessed via $4016 and $4017, respectively.

The joypads are reset via a strobing-method: writing 1, then 0, to
$4016. See Subsection H for information regarding "half-strobing."

On a full strobe, the joypad's button status will be returned in a
single-bit stream (D0). Multiple reads need to be made to read all the
information about the controller.

1 = A 9 = Ignored 17 = +--+
2 = B 10 = Ignored 18 = +-- Signature
3 = SELECT 11 = Ignored 19 = |
4 = START 12 = Ignored 20 = +--+
5 = UP 13 = Ignored 21 = 0
6 = DOWN 14 = Ignored 22 = 0
7 = LEFT 15 = Ignored 23 = 0
8 = RIGHT 16 = Ignored 24 = 0

See Subsection G for information about Signatures.


B. The Zapper
-------------
The Zapper (otherwise known as the "Light Gun") simply uses bits
within $4016 and $4017, described in Section 8. See bits D4, D3, and
D0.

It is possible to have two Zapper units connected to both joypad
ports simultaneously.


C. Four-player devices
----------------------
Some NES games allow the use of a four-player adapter, extending the
number of usable joypads from two (2) to four (4). Carts which use
the quad-player device are Tengen's "Gauntlet II," and Nintendo's
"RC Pro Am 2."

All four (4) controllers read their status-bits from D0 of $4016 or
$4017, as Subsection A states.

For register $4016, reads #1-8 control joypad #1, and reads #9-16
control joypad #3. For $4017, it is respective for joypad #2 and #4.

The following is a list of read #s and their results.

1 = A 9 = A 17 = +--+
2 = B 10 = B 18 = +-- Signature
3 = SELECT 11 = SELECT 19 = |
4 = START 12 = START 20 = +--+
5 = UP 13 = UP 21 = 0
6 = DOWN 14 = DOWN 22 = 0
7 = LEFT 15 = LEFT 23 = 0
8 = RIGHT 16 = RIGHT 24 = 0

See Subsection G for information about Signatures.


D. Paddles
----------
Taito's "Arkanoid" uses a paddle as it's primary controller.

The paddle position is read via D1 of $4017; the read data is inverted
(0=1, 1=0). The first value read is the MSB, and the 8th value read is
(obviously) the LSB. Valid value ranges are 98 to 242, where 98 rep-
resents the paddle being turned completely counter-clockwise.

For example, if %01101011 is read, the value would be NOT'd, making
%10010100 which is 146.

The paddle also contains one button, which is read via D1 of $4016. A
value of 1 specifies that the button is being pressed.


E. Power Pad
------------
No information is currently available.


F. R.O.B. (Robot Operated Buddy)
--------------------------------
No information is currently available.


G. Signatures
-------------
A signature allows the programmer to detect if a device is connected
to one of the four (4) ports or not, and if so, what type of device it
is. Valid/known signatures are:

%0000 = Disconnected
%0001 = Joypad ($4016 only)
%0010 = Joypad ($4017 only)


H. Expansion ports
------------------
The joypad strobing process requires dual writes: 1, then 0. If the
strobing process is not completed, or occurs in a non-standard order,
the joypads are no longer the item of communication: the expansion
port is.

For NES users, the expansion port is located on the bottom of the unit,
covered by a small grey piece of plastic. Famicom users have a limited
expansion port on the front of their unit, which was commonly used for
joypads or turbo-joypads.

Such an example of communicating with the expansion port would be the
following code:

LDA #%00000001
STA $4016
STA $4017 ; Begin read mode of expansion port
LDA #%00000011 ; Write %110 to the expansion port
STA $4016

I have yet to encounter a cart which actually uses this method of
communication.


I. Notes
--------
None.



+----------------------------+
| 7. Memory Mapping Hardware |
+----------------------------+

Due to the large number of mappers used (over 64), the "MMC" section
which was once fluid in v0.53 of this document, has now been removed.

All is not lost, as another document by \FireBug\ of Vertigo 2099 con-
tains accurate information about nearly every mapper in existence. You
can retrieve a copy via one of the following URLs:

http://free.prohosting.com/~nintendo/mappers.nfo

Please note I take no responsibility for the information contained in the
aforementioned document. Contact lavos999@aol.com for more information.



+--------------+
| 8. Registers |
+--------------+
プログラマは、PPUやpAPUとはレジスタ:NESに変更を行う、
前もって決められたメモリの場所 を通してコミュニケートする。
レジスタがないと、プログラムは動作しない。

それぞれのレジスタは16ビットアドレスである。
それぞれのレジスタは解説の直後に書かれたカッコの中に統計領域を持つ。

R = 読込可能 W = 書き込み可能
2 = 2度書きレジスタ 16 = 16ビットレジスタ

メモ: 16-bit registers actually consist of two linear 8-bit registers,
which can (and will be) *INDEPENDANTLY* assigned. The reason for
specifying them as 16-bit is for ease of documentation. For
instance, "$4002+$4003" would mean that D15-D8 would be in $4003,
and D7-D0 would be in $4002.
16ビットレジスタは実際には*独立に*割り当てられた
2つの8ビットアドレスによって構成されている。
16ビットとして指定してあるのは文書の簡易化の為である。
例えば、"$4002+$4003"は、D15-D8は$4003にあり
D7-D0は$4002にあることを意味している。
メモ: リストされていないビットは使われていないと考えられる。

+---------+----------------------------------------------------------+
|アドレス | 解説 |
+---------+----------------------------------------------------------+
| $2000 | PPU制御レジスタ #1 (W) |
| | |
| | D7: VBlank時にNMIを実行 |
| | 0 = 無効 |
| | 1 = 有効 |
| | D6: PPUマスタ/スレーブ 選択 --+ |
| | 0 = マスタ +-- 不使用 |
| | 1 = スレーブ --+ |
| | D5: スプライトサイズ |
| | 0 = 8x8 |
| | 1 = 8x16 |
| | D4: BGパターンテーブルアドレス |
| | 0 = $0000 (VRAM) |
| | 1 = $1000 (VRAM) |
| | D3: スプライトパターンテーブルアドレス |
| | 0 = $0000 (VRAM) |
| | 1 = $1000 (VRAM) |
| | D2: PPUアドレス増加値 |
| | 0 = 1ずつ増加 |
| | 1 = 32ずつ増加 |
| | D1-D0: ネームテーブルアドレス |
| | 00 = $2000 (VRAM) |
| | 01 = $2400 (VRAM) |
| | 10 = $2800 (VRAM) |
| | 11 = $2C00 (VRAM) |
+---------+----------------------------------------------------------+
| $2001 | PPU制御レジスタ #2 (W) |
| | |
| | D7-D5: Full Background カラー (D0 == 1の時) |
| | 000 = None +------------+ |
| | 001 = Green | NOTE: Do not use more |
| | 010 = Blue | than one type |
| | 100 = Red +------------+ |
| | D7-D5: Colour Intensity (D0 == 0の時) |
| | 000 = None +--+ |
| | 001 = Intensify green | NOTE: Do not use more |
| | 010 = Intensify blue | than one type |
| | 100 = Intensify red +--+ |
| | D4: スプライト表示 |
| | 0 = スプライトを表示しない |
| | 1 = スプライトを表示する |
| | D3: 背景表示 |
| | 0 = BGを表示しない |
| | 1 = BGを表示する |
| | D2: スプライトクリップ |
| | 0 = 左端8ピクセルのスプライトは表示しない |
| | 1 = 切り抜きしない |
| | D1: BGクリップ |
| | 0 = 左端8ピクセルのBGは表示しない |
| | 1 = 切り抜きしない |
| | D0: ディスプレイタイプ |
| | 0 = カラー |
| | 1 = モノクロ |
+---------+----------------------------------------------------------+
| $2002 | PPUステータスレジスタ (R) |
| | |
| | D7: VBlank発生 |
| | 0 = 発生していない |
| | 1 = VBlank発生あり |
| | D6: スプライト #0 ヒット発生 |
| | 0 = スプライト #0 ヒットなし |
| | 1 = スプライト #0 ヒットあり |
| | D5: スキャンラインスプライトカウント |
| | 0 = 現在のスキャンラインにスプライトが8個以下 |
| | 1 = 現在のスキャンラインにスプライトが9個以上 |
| | D4: VRAM 書き込みフラグ |
| | 0 = VRAMへの書き込みは有効 |
| | 1 = VRAMへの書き込みは無視される |
| | |
| | メモ: D7は読込の後に0がセットされる。 |
| | メモ: 読込の後、$2005はリセットされるため、次の$2005への |
| | 書込は水平になる。 |
| | メモ: 読込の後、$2006はリセットされるため、次の$2006への |
| | 書込は高次バイトになる。 |
| | |
| | D6に関する詳細な情報はセクション4の項目Lを参照。 |
+---------+----------------------------------------------------------+
| $2003 | SPR-RAMアドレスレジスタ (W) |
| | |
| | D7-D0: $2004を通してSPR-RAMにアクセスするための8ビット |
| | アドレス。 |
+---------+----------------------------------------------------------+
| $2004 | SPR-RAM I/O レジスタ (W) |
| | |
| | D7-D0: SPR-RAMに書き込む8ビットデータ |
+---------+----------------------------------------------------------+
| $2005 | VRAMアドレスレジスタ #1 (W2) |
| | |
| | スクリーンを(スプライトを除き)水平・垂直にスクロール |
| | するために使用される。しかし、NESは実際にスクロールする |
| | ハードウェアを持っていない。このレジスタはVRAMアドレス |
| | ラインを制御しているのである。 |
| | |
| | 詳細情報に関してはセクション4の項目Nを参照。 |
+---------+----------------------------------------------------------+
| $2006 | VRAMアドレスレジスタ #2 (W2) |
| | |
| | $2007を通してVRAMにアクセスするための16ビットアドレスを |
| | 指定するのに用いられる。しかしながら、このレジスタは |
| | VRAMアドレスビットを制御するので、それ故にこれが |
| | どのように、いつ働くかの知識を持って使わねばならない。 |
| | |
| | 詳細情報に関してはセクション4の項目Nを参照。 |
+---------+----------------------------------------------------------+
| $2007 | VRAM I/O レジスタ (RW) |
| | |
| | D7-D0: VRAMに対する読み書きのデータ |
+---------+----------------------------------------------------------+
| $4000 | pAPU Pulse #1 Control Register (W) |
| $4001 | pAPU Pulse #1 Ramp Control Register (W) |
| $4002 | pAPU Pulse #1 Fine Tune (FT) Register (W) |
| $4003 | pAPU Pulse #1 Coarse Tune (CT) Register (W) |
| $4004 | pAPU Pulse #2 Control Register (W) |
| $4005 | pAPU Pulse #2 Ramp Control Register (W) |
| $4006 | pAPU Pulse #2 Fine Tune Register (W) |
| $4007 | pAPU Pulse #2 Coarse Tune Register (W) |
| $4008 | pAPU Triangle Control Register #1 (W) |
| $4009 | pAPU Triangle Control Register #2 (?) |
| $400A | pAPU Triangle Frequency Register #1 (W) |
| $400B | pAPU Triangle Frequency Register #2 (W) |
| $400C | pAPU Noise Control Register #1 (W) |
| $400D | Unused (???) |
| $400E | pAPU Noise Frequency Register #1 (W) |
| $400F | pAPU Noise Frequency Register #2 (W) |
| $4010 | pAPU Delta Modulation Control Register (W) |
| $4011 | pAPU Delta Modulation D/A Register (W) |
| $4012 | pAPU Delta Modulation Address Register (W) |
| $4013 | pAPU Delta Modulation Data Length Register (W) |
+---------+----------------------------------------------------------+
| $4014 | スプライトDMAレジスタ (W) |
| | |
| | 256バイトのメモリをSPR-RAMに転送する。ここに書かれた |
| | 値がNとすると、アドレス$100*Nからのメモリを転送する。 |
+---------+----------------------------------------------------------+
| $4015 | pAPU Sound/Vertical Clock Signal Register (R) |
| | |
| | D7: Vertical Clock Signal IRQ Availability |
| | 0 = One (1) frame occuring, hence IRQ cannot |
| | occur |
| | 1 = One (1) frame is being interrupted via IRQ |
| | (訳者注:nestech.txtではD6になっていたが間違い。) |
| | D4: Delta Modulation |
| | D3: Noise |
| | D2: Triangle |
| | D1: Pulse #2 |
| | D0: Pulse #1 |
| | 0 = Not in use |
| | 1 = In use |
| +----------------------------------------------------------+
| | pAPU Channel Control (W) |
| | |
| | D4: Delta Modulation |
| | D3: ノイズ波 |
| | D2: 三角波 |
| | D1: 矩形波 #2 |
| | D0: 矩形波 #1 |
| | 0 = Channel 無効 |
| | 1 = Channel 有効 |
+---------+----------------------------------------------------------+
| $4016 | Joypad #1 (RW) |
| | |
| | READING: |
| | D4: Zapper Trigger |
| | 0 = Pulled |
| | 1 = Released (not held) |
| | D3: Zapper Sprite Detection |
| | 0 = Sprite not in position |
| | 1 = Sprite in front of cross-hair |
| | D0: Joypad Data |
| +----------------------------------------------------------+
| | WRITING: |
| | Joypad Strobe (W) |
| | |
| | D0: Joypad Strobe |
| | 0 = Clear joypad strobe |
| | 1 = Reset joypad strobe |
| +----------------------------------------------------------+
| | WRITING: |
| | Expansion Port Latch (W) |
| | |
| | D0: Expansion Port Method |
| | 0 = Write |
| | 1 = Read |
+---------+----------------------------------------------------------+
| $4017 | Joypad #2/SOFTCLK (RW) |
| | |
| | READING: |
| | D7: Vertical Clock Signal (External) |
| | 0 = Not occuring |
| | 1 = Occuring |
| | D6: Vertical Clock Signal (Internal) |
| | 0 = Occuring (D6 of $4016 affected) |
| | 1 = Not occuring (D6 of $4016 untouchable) |
| | D4: Zapper Trigger |
| | 0 = Pulled |
| | 1 = Released (not held) |
| | D3: Zapper Sprite Detection |
| | 0 = Sprite not in position |
| | 1 = Sprite in front of cross-hair |
| | D0: Joypad Data |
| +----------------------------------------------------------+
| | WRITING: |
| | Expansion Port Latch (W) |
| | |
| | D0: Expansion Port Method |
| | 0 = ??? |
| | 1 = Read |
+---------+----------------------------------------------------------+



+-----------------+
| 9. File Formats |
+-----------------+

A. iNES Format (.NES)
---------------------
+--------+------+------------------------------------------+
| Offset | Size | Content(s) |
+--------+------+------------------------------------------+
| 0 | 3 | 'NES' |
| 3 | 1 | $1A |
| 4 | 1 | 16K PRG-ROM ページの数 |
| 5 | 1 | 8K CHR-ROM ページの数 |
| 6 | 1 | ROM Control Byte #1 |
| | | %####vTsM |
| | | | ||||+- 0=水平ミラー |
| | | | |||| 1=垂直ミラー |
| | | | |||+-- 1=SRAM 有効 |
| | | | ||+--- 1=512-byte トレイナー |
| | | | |+---- 1=Four-screen mirroring |
| | | | | |
| | | +--+----- Mapper # (下位 4-bits) |
| 7 | 1 | ROM Control Byte #2 |
| | | %####0000 |
| | | | | |
| | | +--+----- Mapper # (上位 4-bits) |
| 8-15 | 8 | $00 |
| 16-.. | | Actual 16K PRG-ROM pages (in linear |
| ... | | order). If a trainer exists, it precedes |
| ... | | the first PRG-ROM page. |
| ..-EOF | | CHR-ROM pages (in ascending order). |
+--------+------+------------------------------------------+



+-------------------------+
| 10. NES プログラミング |
+-------------------------+

A. 一般情報
----------------------
無し。


B. CPU
------------
なし。セクション11の項目Bを参照。


C. PPU
------------
Reading and writing to VRAM consists of a multi-step process:

Writing to VRAM Reading from VRAM
--------------- -----------------
1) Wait for VBlank 1) Wait for VBlank
2) Write upper VRAM address 2) Write upper VRAM address
byte into $2006 byte into $2006
3) Write lower VRAM address 3) Write lower VRAM address
byte into $2006 byte into $2006
4) Write data to $2007 4) Read $2007 (invalid data once)
5) Read data from $2007

NOTE: Step #4 when reading VRAM is only necessary when reading
VRAM data not in the $3F00-3FFF range.

NOTE: Accessing VRAM should only be performed during VBlank. Attempts
to access VRAM outside of VBlank will usually result in garbage
showing up on the screen. See Section 4, Subsection N for more
information regarding why this occurs.

Waiting for VBlank is quite simple:

8000: LDA $2002
BPL $8000

Reading $2002 will result in all bits being returned; however, D7
will be reset to 0 after the read is performed.

The actual on-screen palette used by the NES, as stated prior, is not
RGB. However, a near-exact replica can be found in common NES emulators
today. Contact the appropriate authors of these emulators to obtain
a valid RGB palette.

Be sure to clear the internal VRAM address via $2006 semi-often. You
will often encounter a situation where a palette fade or a VRAM update
will cause the screen "to be trashed" (squares on the screen, or what
seem to be graphical "glitches"). The reason for this is that your code
took longer than a VBlank. When the VBlank goes to refresh the screen
with the data in the PPU, it takes whatever value is in the internal
VRAM address and uses that as the starting base for Name Table #0.
The solution is to fix your code by re-assigning the VRAM address to
$0000 (or $2000), so that the refresh may occur successfully. Such
code would be:

LDA #$00
STA $2006
STA $2006

You will find code like this in commercial games quite often.



+---------------+
| 11. Emulation |
+---------------+

A. General Information
----------------------
If you're going to be programming an emulator in C or C++, please be
familiar with pointers. Being familiar with pointers will help you
out severely when it comes to handling mirroring and VRAM addressing.
For you assembly buffs out there, obviously pointers are nothing more
than indirect addressing -- it's easier to change a 32-bit value than
to swap in and out an entire 64K of data.

When SRAM ($6000-7FFF) is disabled, writes to the memory area should
be ignored. Reads will possibly return data previously left on the
bus, and therefore when emulated should return 0 (or should be trap-
ped).

RAM-based memory areas ($0000-07FF) should *NOT* be zeroed on RESET;
they should be zeroed on power on/off. (Technically, the RAM is not
zeroed on power on/off either: the RAM will slowly dissapate over
time when the unit it off. However, for emulation purposes, please
make sure that a cold boot and a warm boot do different things).

See Section 12, Subsection E for Mailing List information.


B. CPU Notes
------------
The NES does not use a 65c02 (CMOS) CPU as rumored.

Ignore opcodes which are bad (or support the option of trapping them).
Some ROM images out there, such as "Adventures of Lolo" contain bad
opcodes, due to dirty connectors on the cartridge during the extract-
ion process (or other reasons).

There are 154 valid opcodes (out of 256 total) on the NES.


C. PPU Notes
------------
The formulae to calculate the base address of a Name Table tile number
is:

(TILENUM * 16) + PATTERNTABLE

Where TILENUM is the tile number in the Name Table, and PATTERNTABLE
is the Pattern Table Address defined via register $2000.

It's recommended that DOS programmers use what is known as "MODE-Q,"
a 256x256x256 "tweaked" video mode, for writing their emulator. Try to
avoid Mode-X modes, as they are non-chained, and result in painfully
slow graphics. Chained modes (like MODE-13h) are linear, and work
best for speedy graphics. Since the NES's resolution is 256x240, the
aforementioned "MODE-Q" should meet all necessary requirements.

Most emulators do not limit the number of sprites which can be displayed
per scanline, while the actual NES will show flicker as a result of more
than eight (8). {Put some more garbage here; it's early...}

Emulators should _NOT_ mask out unused bits within registers; doing so
may result in a cart not working.


D. APU Notes
------------
To be written.



+------------------------+
| 12. 参考文献 |
+------------------------+

A. CPU Information
------------------
なし


B. PPU Information
------------------
なし


C. APU Information
------------------
なし


D. MMC Information
------------------
なし


E. Mailing Lists
----------------
There is a NES Development Mailing List in existence. Contact Mark Knibbs
for more information. This list is for anyone who wishes to discuss tech-
nical issues about the NES; it is not a list for picking up the latest
and greatest information about NES emulators or what not.


F. WWW Sites
------------
The following are a list of WWW sites which contain NES-oriented
material. If you encounter errors, bad links, or other anomolies
while visiting these sites, contact the site authors/owners, NOT
me. Thanks.

http://nesdev.parodius.com/

Contains a verbose amount of documentation regarding anything
NES-oriented, including hard-to-find mapper documentation. Seems
to be a decent NES information depository.

http://www.ameth.org/~veilleux/NES_info.html

Currently only contains hardware-oriented material, such as
overviews of cart and unit ASICs, mappers, and MMCs. Many
pinout diagrams for mappers and NES units are available here.
Also provides documentation on NES repair, modifying your NES
to give stereo output, applying stereo mixing to your NES, and
much much more.


G. Hardware Information
-----------------------
The following security bits may be purchased from MCM Electronics
(http://www.mcmelectronics.com/):

For NES carts: 22-1145 (3.8mm security bit)
For NES units: 22-1150 (4.5mm security bit)

The 4.5mm security screw is also used for the Super Nintendo Enter-
tainment System (SNES), and Nintendo 64.